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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12411695 B1

PDFFull Text
Date of Patent:
Sep. 09, 2025

Filed:

May. 04, 2023

Multicore processor with each core having independent floating point datapath and integer datapath

Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Elmoustapha Ould-Ahmed-Vall, Chandler, AZ (US);

Barath Lakshmanan, Chandler, AZ (US);

Tatiana Shpeisman, Menlo Park, CA (US);

Joydeep Ray, Folsom, CA (US);

Ping T. Tang, Edison, NJ (US);

Michael Strickland, Sunnyvale, CA (US);

Xiaoming Chen, Shanghai, CN;

Anbang Yao, Beijing, CN;

Ben J. Ashbaugh, Folsom, CA (US);

Linda L Hurd, Cool, CA (US);

Liwei Ma, Beijing, CN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:

Jaffery Watson Hamilton & DeSanctis LLP

Primary Examiner:

Shawn Doman

Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/50 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01); G06F 15/80 (2006.01); G06F 16/242 (2019.01); G06N 3/00 (2023.01); G06N 3/044 (2023.01); G06N 3/045 (2023.01); G06N 3/063 (2023.01); G06N 3/084 (2023.01); G06N 20/00 (2019.01); G06N 20/10 (2019.01); G06T 1/20 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3887 (2013.01); G06F 9/3001 (2013.01); G06F 9/30014 (2013.01); G06F 9/30036 (2013.01); G06F 9/30094 (2013.01); G06F 9/30109 (2013.01); G06F 9/30112 (2013.01); G06F 9/3016 (2013.01); G06F 9/3851 (2013.01); G06F 9/3888 (2023.08); G06F 9/38885 (2023.08); G06F 9/3891 (2013.01); G06F 9/50 (2013.01); G06F 13/4068 (2013.01); G06F 13/4282 (2013.01); G06F 15/80 (2013.01); G06N 3/00 (2013.01); G06N 3/044 (2023.01); G06N 3/045 (2023.01); G06N 3/063 (2013.01); G06N 3/084 (2013.01); G06N 20/00 (2019.01); G06N 20/10 (2019.01); G06T 1/20 (2013.01); G06F 2213/0026 (2013.01);
Abstract

Described herein is a general-purpose graphics processing unit including a multiprocessor having a single instruction, multiple thread, SIMT, architecture. The multiprocessor comprises multiple sets of compute units each having a first logic unit configured to perform floating-point operations and a second logic unit configured to perform integer operations, with a thread of the floating-point instruction being executed in parallel with a thread of the integer instruction.

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