The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 02, 2025
Filed:
May. 08, 2024
United Microelectronics Corp., Hsin-Chu, TW;
Ruei-Yau Chen, Pingtung County, TW;
Wei-Jen Wang, Tainan, TW;
Kun-Yuan Wu, Kaohsiung, TW;
Chien-Fu Chen, Miaoli County, TW;
Chen-Hsien Hsu, Hsinchu County, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Abstract
An integrated circuit layout includes an upper active region comprising a first edge and a second edge extending along a first direction and respectively adjacent to an upper cell boundary by a distance Dand a distance D. A first gate line is disposed on the upper active region, extends along a second direction, and protrudes from the first edge by a length L. A second gate line is disposed on the upper active region, extends along the second direction, and protrudes from the second edge by a length L. Two dummy gate lines respectively extend along the second direction and are disposed at two sides of the upper active region and away from the upper cell boundary by a distance S. The first direction and the second direction are perpendicular. The distances D, D, S and the lengths Land Lhave the relationships: L≤D−S, L≤D−S, and D≠D