The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 02, 2025

Filed:

Oct. 07, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chung-Liang Cheng, Changhua County, TW;

Ziwei Fang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2025.01); H01L 21/02 (2006.01); H01L 21/285 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 30/69 (2025.01); H10D 62/00 (2025.01); H10D 62/13 (2025.01); H10D 64/62 (2025.01);
U.S. Cl.
CPC ...
H01L 21/28518 (2013.01); H01L 21/02063 (2013.01); H01L 21/02244 (2013.01); H10D 30/024 (2025.01); H10D 30/6211 (2025.01); H10D 30/797 (2025.01); H10D 62/021 (2025.01); H10D 62/151 (2025.01); H10D 64/62 (2025.01);
Abstract

A semiconductor structure is provided. The semiconductor structure includes an epitaxial structure over a semiconductor substrate. The semiconductor structure also includes a conductive feature over the semiconductor substrate. The conductive feature includes a high-k dielectric layer and a metal layer on the high-k dielectric layer, and a top surface of the metal layer is below a top surface of the high-k dielectric layer. The semiconductor structure further includes a metal-semiconductor compound layer formed on the epitaxial structure. In addition, the semiconductor structure includes a first metal contact structure formed on the top surface of the metal layer of the conductive feature. The semiconductor structure further includes a second metal contact structure formed on the metal-semiconductor compound layer.


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