The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 02, 2025

Filed:

Mar. 10, 2022
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Chih-Yueh Lin, Hsinchu County, TW;

Chun-Yi Lin, Hsinchu County, TW;

Shang-Yu Liu, Hsinchu County, TW;

Jie-Ru Bai, Taichung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/327 (2020.01); G06F 30/392 (2020.01);
U.S. Cl.
CPC ...
G06F 30/327 (2020.01); G06F 30/392 (2020.01);
Abstract

A method of extracting parasitic parameters of a 3D IC is provided in the present invention, including steps of providing a 3D IC having multiple dies, merging respective layouts of the multiple dies into a common layout, creating a common LVS file and a common LPE file for those multiple dies based on the common layout, creating respective LVS files and respective LPE files for every die based on the respective layouts, creating a common netlist from the common LVS file and common LPE file, creating corresponding respective netlists from the respective LVS files and respective LPE files, merging the common netlist and respective netlists into a netlist, and extracting common parasitic parameters of the dies from the netlist.


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