The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2025

Filed:

Apr. 12, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Shih-Wei Peng, Hsinchu, TW;

Guo-Huei Wu, Hsinchu, TW;

Jiann-Tyng Tzeng, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 89/10 (2025.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 119/18 (2020.01); H01L 23/528 (2006.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 89/10 (2025.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); H01L 23/5286 (2013.01); H10D 84/0186 (2025.01); H10D 84/0193 (2025.01); H10D 84/038 (2025.01); H10D 84/853 (2025.01); G06F 2119/18 (2020.01);
Abstract

An integrated circuit includes metal rails. The integrated circuit includes a first layer including a first metal rail and a second layer including a second metal rail, where the second layer is above the first layer along a first direction. The integrated circuit includes a third layer including an active region of a transistor, where the third layer is above the second layer along the first direction. The integrated circuit includes a fourth layer including a third metal rail, where the fourth layer is above the third layer along the first direction. The integrated circuit includes a fifth layer including a fourth metal rail, where the fifth layer is above the fourth layer along the first direction.


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