The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2025

Filed:

Jan. 09, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Shahaji B. More, Hsinchu, TW;

Chandrashekhar Prakash Savant, Hsinchu, TW;

Tien-Wei Yu, Kaohsiung, TW;

Chia-Ming Tsai, Zhubei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/66 (2025.01); H01L 21/28 (2025.01); H10D 64/27 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 64/667 (2025.01); H01L 21/28088 (2013.01); H10D 64/517 (2025.01); H10D 84/853 (2025.01);
Abstract

A semiconductor device includes a gate structure disposed over a channel region and a source/drain region. The gate structure includes a gate dielectric layer over the channel region, one or more work function adjustment material layers over the gate dielectric layer, and a metal gate electrode layer over the one or more work function adjustment material layers. The one or more work function adjustment layers includes an aluminum containing layer, and a diffusion barrier layer is disposed at at least one of a bottom portion and a top portion of the aluminum containing layer. The diffusion barrier layer is one or more of a Ti-rich layer, a Ti-doped layer, a Ta-rich layer, a Ta-doped layer and a Si-doped layer.


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