The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 19, 2025
Filed:
Jun. 23, 2022
Changxin Memory Technologies, Inc., Hefei, CN;
Beijing Superstring Academy of Memory Technology, Beijing, CN;
Xiaoguang Wang, Hefei, CN;
Huihui Li, Hefei, CN;
Qiang Zhang, Hefei, CN;
Shan Wang, Hefei, CN;
Minmin Wu, Hefei, CN;
CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei, CN;
BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY, Beijing, CN;
Abstract
Embodiments relate to the field of semiconductor manufacturing technology, and more particularly, to a method for fabricating a semiconductor structure and a semiconductor structure. The fabricating method includes: providing a substrate including an array region and a peripheral region; and forming, on the substrate, a first mask layer covering the array region and the peripheral region, the first mask layer having a first device structure pattern directly facing the array region and a second device structure pattern directly facing the peripheral region. Through the method for fabricating a semiconductor structure, the first mask layer having the first device structure pattern and the second device structure pattern is formed on the substrate, and then the substrate is etched by using the first device structure pattern and the second device structure pattern as mask layer to synchronously form a peripheral region structure and an array region structure on the substrate.