The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2025

Filed:

Sep. 19, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Songmei Shen, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/00 (2025.01); H10D 64/01 (2025.01); H10D 64/66 (2025.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10D 64/679 (2025.01); H10D 64/01 (2025.01); H10B 12/00 (2023.02);
Abstract

A semiconductor structure and a method for preparing a semiconductor structure are provided. The method for preparing the semiconductor structure includes operations as follows. A substrate is provided, and a plurality of gate structures are arranged at intervals on the substrate. A sacrificial sidewall with a preset thickness is formed on a sidewall of the gate structure. A first dielectric layer is formed between adjacent sacrificial sidewalls, a top of the first dielectric layer being flush with a top of the gate structure and a top of the sacrificial sidewalls. The sacrificial sidewall is removed and an air gap structure is formed on the sidewall of the gate structure. A second dielectric layer is formed, the second dielectric layer covering the top of the gate structure, a top opening of the air gap structure and the top of the first dielectric layer.


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