The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2025

Filed:

Feb. 09, 2024
Applicant:

Lodestar Licensing Group Llc, Evanston, IL (US);

Inventors:

Shuangqiang Luo, Boise, ID (US);

Indra V. Chary, Boise, ID (US);

Justin B. Dorhout, Boise, ID (US);

Assignee:

Lodestar Licensing Group LLC, Evanston, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 41/27 (2023.01); G11C 5/02 (2006.01); G11C 5/06 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01); H10B 43/27 (2023.01);
U.S. Cl.
CPC ...
H10B 41/27 (2023.02); G11C 5/025 (2013.01); G11C 5/06 (2013.01); H01L 21/76838 (2013.01); H01L 23/5386 (2013.01); H01L 24/14 (2013.01); H10B 43/27 (2023.02);
Abstract

A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, the tiers individually comprising one of the conductive structures and one of the insulative structures, first support pillar structures extending through the stack structure within a first region of the microelectronic device, the first support pillar structures electrically isolated from a source structure underlying the stack structure, second support pillar structures extending through the stack structure within a second region of the microelectronic device, the second support pillar structures comprising an electrically conductive material in electrical communication with the source structure, and bridge structures extending between at least some neighboring first support pillar structures of the first support pillar structures. Related memory devices, electronic systems, and methods are also described.


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