The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2025

Filed:

Aug. 16, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventor:

Wei-Hung Lin, Xinfeng Township, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5383 (2013.01); H01L 21/4857 (2013.01); H01L 23/49894 (2013.01); H01L 23/5385 (2013.01); H01L 23/562 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13155 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32221 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/0665 (2013.01);
Abstract

A semiconductor package includes a package substrate a package substrate including: a substrate core; an upper redistribution layer disposed on a first side of the substrate core; and a lower redistribution layer disposed on an opposing second side of the substrate core; a semiconductor device vertically stacked on and electrically connected to the package substrate; and an upper reinforcement layer embedded in the upper redistribution layer between the semiconductor device and the substrate core, the upper reinforcement layer having a Young's modulus that is higher than a Young's modulus of the upper redistribution layer.


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