The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 19, 2025
Filed:
Dec. 23, 2023
Applicant:
Intel Ndtm Us Llc, Santa Clara, CA (US);
Inventors:
Tarek Ahmed Ameen Beshari, San Jose, CA (US);
Shantanu R. Rajwade, San Mateo, CA (US);
Ahsanur Rahman, Folsom, CA (US);
Sagar Upadhyay, Folsom, CA (US);
Pratyush Chandrapati, Folsom, CA (US);
Assignee:
Intel NDTM US LLC, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G11C 16/04 (2006.01); G11C 16/24 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 16/0483 (2013.01); G11C 16/24 (2013.01);
Abstract
A storage device charges bitlines in preparation for a program pulse. To charge the bitlines, the storage device connects the bitlines to an external regulator instead of an internal regulator to prepare them for the program pulse. The system can charge all bitlines to the external regulator high voltage reference before changing to the internal regulator for bitline stabilization before the program pulse.