The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2025

Filed:

Dec. 18, 2020
Applicant:

Hamamatsu Photonics K.k., Hamamatsu, JP;

Inventors:

Takashi Kasahara, Hamamatsu, JP;

Katsumi Shibayama, Hamamatsu, JP;

Masaki Hirose, Hamamatsu, JP;

Toshimitsu Kawai, Hamamatsu, JP;

Hiroki Oyama, Hamamatsu, JP;

Yumi Kuramoto, Hamamatsu, JP;

Assignee:

HAMAMATSU PHOTONICS K. K., Hamamatsu, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01J 3/26 (2006.01); B23K 26/00 (2014.01); B23K 26/06 (2014.01); B23K 26/064 (2014.01); B23K 26/53 (2014.01); B23K 101/40 (2006.01); B23K 103/00 (2006.01); B81B 3/00 (2006.01); B81C 1/00 (2006.01); G01J 3/02 (2006.01); G02B 5/28 (2006.01); G02B 26/00 (2006.01);
U.S. Cl.
CPC ...
G01J 3/26 (2013.01); B23K 26/0006 (2013.01); B23K 26/064 (2015.10); B23K 26/0643 (2013.01); B23K 26/53 (2015.10); B81B 3/0072 (2013.01); B81C 1/00539 (2013.01); B81C 1/00634 (2013.01); G01J 3/0243 (2013.01); G02B 5/284 (2013.01); G02B 26/001 (2013.01); B23K 2101/40 (2018.08); B23K 2103/56 (2018.08);
Abstract

A method of manufacturing a Fabry-Perot interference filter includes a forming step of forming a first thinned region, a first mirror layer, a sacrificial layer, and a second mirror layer are formed on a first main surface of a wafer, and the first thinned region in which at least one of the first mirror layer, the sacrificial layer, and the second mirror layer is partially thinned along each of a plurality of lines is formed; a cutting step of cutting the wafer into a plurality of substrates along each of the plurality of lines by forming a modified region within the wafer along each of the plurality of lines through irradiation of a laser light, after the forming step; and a removing step of removing a portion from the sacrificial layer through etching, between the forming step and the cutting step or after the cutting step.


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