The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2025

Filed:

Jun. 24, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Chun-Wen Cheng, Hsinchu County, TW;

Yi-Chuan Teng, Hsinchu County, TW;

Cheng-Yu Hsieh, Hsinchu, TW;

Lee-Chuan Tseng, New Taipei, TW;

Shih-Chang Liu, Kaohsiung County, TW;

Shih-Wei Lin, Taipei, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
B81B 7/00 (2006.01); B81B 3/00 (2006.01); B81C 1/00 (2006.01);
U.S. Cl.
CPC ...
B81B 7/008 (2013.01); B81B 3/0005 (2013.01); B81B 7/0041 (2013.01); B81C 1/00277 (2013.01); B81C 1/00293 (2013.01); B81B 2201/02 (2013.01); B81B 2207/012 (2013.01); B81C 2203/0145 (2013.01); B81C 2203/0172 (2013.01); B81C 2203/019 (2013.01); B81C 2203/0792 (2013.01); H01L 2224/11 (2013.01);
Abstract

The present disclosure provides a semiconductor structure and a method for fabricating semiconductor structure. The semiconductor structure includes a first device, configured to be a complementary metal oxide semiconductor device, wherein the first device includes a substrate, a multi-layer structure disposed on the substrate, a first hole, defined between a first end with a first circumference and a second end with a second circumference, a second hole, aligned to the first hole and defined between the second end and a third end with a third circumference, wherein the third circumference is larger than the first circumference and the second circumference, and a second device, configured to be a micro-electro mechanical system device and bonded to the first device, wherein a first chamber is between the first device and the second device, and the first end links with the first chamber, and a sealing object configured to seal the second hole.


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