The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2025
Filed:
Oct. 23, 2020
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventor:
David H. Wells, Boise, ID (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10N 70/00 (2023.01); G11C 13/00 (2006.01); H10B 63/00 (2023.01); H10B 63/10 (2023.01); H10N 70/20 (2023.01);
U.S. Cl.
CPC ...
H10N 70/821 (2023.02); G11C 13/0004 (2013.01); G11C 13/0023 (2013.01); H10B 63/10 (2023.02); H10B 63/84 (2023.02); H10N 70/231 (2023.02); G11C 2213/71 (2013.01);
Abstract
A three-dimensional variable resistance memory array and method of forming the same. The memory array has memory cells in multiple planes in three dimensions. The planes of the memory cells include shared interconnect lines, dually connected to driving and sensing circuits, that are used for addressing the cells for programming and reading. The memory array is formed using only a single patterned mask per central array plane to form the memory cells of such planes.