The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2025

Filed:

Jul. 27, 2023
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Yidan Liu, Shanghai, CN;

Liang Li, Shanghai, CN;

Chao Xu, Shanghai, CN;

Yingying Zhu, Shanghai, CN;

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 16/0433 (2013.01); G11C 16/102 (2013.01);
Abstract

Technology is disclosed herein for a dynamic bitscan. The dynamic bitscan may include performing a first bitscan of a first strict subset of memory cells. Then, based on results of the first bitscan, a determination is made whether to perform a second bitscan of a second strict subset of memory cells. Prior to the bitscan(s) a verify reference voltage may be applied to both strict subsets of memory cells. Skipping the second bitscan saves considerable time. However, the second bitscan is performed at least sometimes, which increases accuracy. The first strict subset of memory cells and the second strict subset of memory cells may have different locations relative to some point in the block that contains the memory cells. The first strict subset of memory cells and the second strict subset may have different programming speeds.


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