The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2025
Filed:
Mar. 31, 2022
Intel Corporation, Santa Clara, CA (US);
Rajat Agarwal, Portland, OR (US);
Sai Prashanth Muralidhara, Portland, OR (US);
Wei P. Chen, Portland, OR (US);
Nishant Singh, Bengaluru, IN;
Sharada Venkateswaran, San Francisco, CA (US);
Daniel W. Liu, Concord, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A system includes a multilevel memory such as a two level memory (2LM), where a first level memory acts as a cache for the second level memory. A memory controller or cache controller can detect a cache miss in the first level memory for a request for data. Instead of automatically performing a swap, the controller can determine whether to perform a swap based on a swap policy assigned to a memory region associated with the address of the requested data.