The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2025

Filed:

Jun. 16, 2023
Applicant:

Phison Electronics Corp., Miaoli, TW;

Inventors:

Szu-Wei Chen, New Taipei, TW;

Yu-Hung Lin, Miaoli County, TW;

I-Sung Huang, Miaoli County, TW;

Po-Cheng Su, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/1009 (2016.01); G11C 16/26 (2006.01); G11C 29/50 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0625 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G06F 12/1009 (2013.01); G11C 16/26 (2013.01); G11C 29/50004 (2013.01); G11C 16/0483 (2013.01); G11C 2029/5004 (2013.01);
Abstract

A read voltage calibration method, a memory storage device, a memory control circuit unit are provided, including: reading, according to a first read command, a first physical unit based on a first read voltage level to obtain first data, and the first read voltage level is a default read voltage level corresponding to the first physical unit or a first voltage difference exists between the first read voltage level and the default read voltage level; decoding the first data to obtain first error bit information; reading, according to a second read command, the first physical unit based on a second read voltage level to obtain second data, and a second voltage difference exists between the second read voltage level and the default read voltage level; decoding the second data to obtain second error bit information; calibrating the default read voltage level according to the first and second error bit information.


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