The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2025

Filed:

Aug. 08, 2022
Applicant:

Globalwafers Co., Ltd., Hsinchu, TW;

Inventors:

Yung Hsing Chu, Zhubei, TW;

Yen-Chun Chou, Taoyuan, TW;

Shan-Hui Lin, Hsinchu, TW;

Assignee:

GlobalWafers Co., Ltd., Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01N 21/88 (2006.01); B24B 9/06 (2006.01); H01L 21/304 (2006.01); H01L 21/66 (2006.01); H01L 21/67 (2006.01);
U.S. Cl.
CPC ...
G01N 21/8851 (2013.01); B24B 9/065 (2013.01); H01L 21/304 (2013.01); H01L 21/67092 (2013.01); H01L 21/67288 (2013.01); H01L 22/12 (2013.01); G01N 2021/8861 (2013.01);
Abstract

A method for processing semiconductor wafers includes obtaining measurement data from a surface of a semiconductor wafer processed by a front-end process tool. The method includes determining a center plane of the wafer based on the measurement data, generating raw shape profiles, and generating ideal shape profiles. The method further includes generating Gapi profiles based on the raw shape profiles and the ideal shape profiles, and calculating a Gapi value of the semiconductor wafer based on the Gapi profiles. The generated Gapi profiles and/or the calculated Gapi value may be used to tune the front-end process tool and/or sort the semiconductor wafer for polishing. Systems include at least a front-end process tool, a flatness measurement tool, and a computing device.


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