The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 05, 2025

Filed:

Oct. 31, 2022
Applicant:

Cambridge Enterprise Limited, Cambridge, GB;

Inventors:

Martin Arnold, Cambridge, GB;

Sheung Wai Fung, Cambridge, GB;

Loizos Efthymiou, Cambridge, GB;

Florin Udrea, Cambridge, GB;

John William Findlay, Cambridge, GB;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/47 (2025.01); H03K 17/0814 (2006.01); H03K 17/30 (2006.01); H03K 17/687 (2006.01); H10D 1/47 (2025.01); H10D 8/00 (2025.01); H10D 8/60 (2025.01); H10D 30/01 (2025.01); H10D 62/10 (2025.01); H10D 62/17 (2025.01); H10D 62/824 (2025.01); H10D 62/85 (2025.01); H10D 64/23 (2025.01); H10D 64/27 (2025.01); H10D 84/01 (2025.01); H10D 84/05 (2025.01); H10D 84/80 (2025.01); H10D 84/82 (2025.01); H10D 84/84 (2025.01); H10D 64/00 (2025.01);
U.S. Cl.
CPC ...
H10D 30/475 (2025.01); H03K 17/08142 (2013.01); H03K 17/302 (2013.01); H03K 17/687 (2013.01); H10D 1/47 (2025.01); H10D 8/00 (2025.01); H10D 8/60 (2025.01); H10D 30/015 (2025.01); H10D 62/824 (2025.01); H10D 84/01 (2025.01); H10D 84/05 (2025.01); H10D 84/811 (2025.01); H10D 84/817 (2025.01); H10D 84/82 (2025.01); H03K 2017/6875 (2013.01); H10D 62/115 (2025.01); H10D 62/343 (2025.01); H10D 62/8503 (2025.01); H10D 64/111 (2025.01); H10D 64/256 (2025.01); H10D 64/257 (2025.01); H10D 64/411 (2025.01); H10D 84/84 (2025.01);
Abstract

A heterojunction device having at least three terminals, the at least three terminals comprising a high voltage terminal, a low voltage terminal and a control terminal. The heterojunction device further comprises at least one main power heterojunction transistor, an auxiliary gate circuit comprising at least one first low-voltage heterojunction transistor, a pull-down circuit comprising a capacitor and a charging path for the capacitor. The heterojunction device further comprises at least one monolithically integrated component, wherein the capacitor is configured to provide an internal rail voltage for the at least one monolithically integrated component.


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