The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 05, 2025

Filed:

Jun. 06, 2023
Applicant:

Silicon Storage Technology, Inc., San Jose, CA (US);

Inventors:

Kha Nguyen, Ho Chi Minh, VN;

Anh Ly, San Jose, CA (US);

Hieu Van Tran, San Jose, CA (US);

Hien Pham, Ho Chi Minh, VN;

Henry Tran, Ho Chi Minh, VN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/12 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1039 (2013.01); G11C 7/12 (2013.01);
Abstract

Numerous examples are disclosed of a row address decoding scheme. In one example, a memory system comprises m banks of non-volatile memory cells, the m banks respectively comprising n or fewer sectors and the sectors respectively comprising p rows, and a row decoder to receive a row address comprising r bits and to identify (i) a row using the least significant t bits in the r bits, (ii) a bank using the next u least significant bits, and (iii) a sector using the next v least significant bits, where m≤2, n≤2, and p≤2.


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