The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 29, 2025

Filed:

Dec. 08, 2023
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Mohammadamin Karami, East Gwillimbury, CA;

Navid Yaghini, Pickering, CA;

Hemesh Yasotharan, Toronto, CA;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/093 (2006.01); H03B 5/12 (2006.01); H03L 7/099 (2006.01);
U.S. Cl.
CPC ...
H03L 7/093 (2013.01); H03B 5/12 (2013.01); H03L 7/099 (2013.01);
Abstract

Multiple voltage amplitudes for an oscillator in a phase-locked loop may be selected to meet various design goals/criteria (e.g., frequency range of operation, jitter, power consumption, etc.). These multiple voltage amplitudes may be stored in a lookup table memory that relates frequency ranges to reference voltages. A reference voltage for a particular oscillator may then be selected and generated. A feedback loop may compare the amplitude output by the oscillator to the reference voltage and adjusts a bias current of the oscillator with the goal of substantially equalizing the oscillator output to the reference voltage.


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