The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 29, 2025

Filed:

Jul. 15, 2024
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Kenneth M. Curewitz, Plymouth, MA (US);

Jaime Cummins, Bainbridge Island, WA (US);

John D. Porter, Boise, ID (US);

Bryce D. Cook, Boise, ID (US);

Jeffrey P. Wright, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/3185 (2006.01); G01R 31/319 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31907 (2013.01); G01R 31/318594 (2013.01); G01R 31/318597 (2013.01);
Abstract

A memory controller and a physical interface layer may accommodate multiple memory types. In some examples, the memory controller and/or PHY may include a register that includes operating parameters for multiple operating modes. Different operating modes may be compatible with different memory types. In some examples, the memory controller and physical interface may be included in a system for testing multiple memory types. The system may provide multiple interfaces for communicating with the memory. The different communication types may be used for performing different tests and/or simulating different types of devices that may utilize the memory.


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