The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2025

Filed:

Aug. 04, 2022
Applicants:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Toshiba Electronic Devices & Storage Corporation, Tokyo, JP;

Inventors:

Kei Tanihira, Himeji Hyogo, JP;

Yoichi Hori, Himeji Hyogo, JP;

Hiroshi Kono, Himeji Hyogo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 8/60 (2025.01); H10D 62/10 (2025.01); H10D 62/17 (2025.01);
U.S. Cl.
CPC ...
H10D 8/60 (2025.01); H10D 62/106 (2025.01); H10D 62/393 (2025.01);
Abstract

A semiconductor device includes a first electrode, a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a fourth semiconductor layer, a fifth semiconductor layer, and a second electrode. The fourth semiconductor layer is located in a second region on the first semiconductor layer. The fourth semiconductor layer is separated from the second semiconductor layer with a portion of the first semiconductor layer interposed. An impurity concentration of the fourth semiconductor layer is greater than an impurity concentration of the first semiconductor layer and less than an impurity concentration of the second semiconductor layer.


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