The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2025

Filed:

Sep. 24, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Ming-Yen Chuang, Hsinchu, TW;

Chia Ling, Hsinchu, TW;

Katherine H. Chiang, New Taipei, TW;

Chung-Te Lin, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H01L 21/02 (2006.01); H10D 1/68 (2025.01); H10D 30/67 (2025.01); H10D 99/00 (2025.01);
U.S. Cl.
CPC ...
H10B 12/315 (2023.02); H01L 21/02565 (2013.01); H10B 12/0335 (2023.02); H10B 12/05 (2023.02); H10B 12/488 (2023.02); H10D 1/716 (2025.01); H10D 30/6729 (2025.01); H10D 30/673 (2025.01); H10D 30/6755 (2025.01); H10D 99/00 (2025.01);
Abstract

A semiconductor structure includes a two-dimensional array of unit cell structures overlying a substrate. Each unit cell structure includes an active layer, a gate dielectric underlying the active layer, two gate electrodes underlying the gate dielectric, and two source electrodes and a drain electrode overlying the active layer. Word lines underlie the active layers. Each unit cell structure includes portions of a respective set of four word lines, which includes two word lines that are electrically connected to two electrodes in the unit cell structure and two additional word lines that are electrically isolated from the two electrodes in the unit cell structure.


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