The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 22, 2025
Filed:
Dec. 21, 2021
Intel Corporation, Santa Clara, CA (US);
Vesh Raj Sharma Banjade, Portland, OR (US);
Satish Chandra Jha, Portland, OR (US);
Ned M. Smith, Beaverton, OR (US);
S M Iftekharul Alam, Hillsboro, OR (US);
Christian Maciocco, Portland, OR (US);
Liuyang Lily Yang, Portland, OR (US);
Mona Vij, Hillsboro, OR (US);
Kshitij Arun Doshi, Tempe, AZ (US);
Francesc Guim Bernat, Barcelona, ES;
Kuilin Clark Chen, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A computing node includes network interface circuitry and processing circuitry. The processing circuitry assigns available computing resources to a plurality of slice contexts. Each slice context of the plurality includes resource allocations of the available computing resources associated with multiple communication networks. A first portion of the resource allocations is designated as dedicated resources and a second, remaining portion is designated as shared resources. A FAFO event associated with a workload is detected. The workload executes on a network slice instance (NSI) associated with a slice context of a subset of slice contexts. The configuration of the NSI is restored to a pre-FAFO event state based on reconfiguring one or both of the dedicated resources or the shared resources of the slice context based on the resource allocations of at least a second slice context in the subset of slice contexts.