The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2025

Filed:

Nov. 18, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Michal Mrozek, Gdansk, PL;

Bartosz Dunajski, Gdansk, PL;

Ben Ashbaugh, Folsom, CA (US);

Brandon Fliflet, El Dorado Hills, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06T 1/60 (2006.01); G06F 3/06 (2006.01); G06T 1/20 (2006.01);
U.S. Cl.
CPC ...
G06T 1/60 (2013.01); G06F 3/0604 (2013.01); G06F 3/0655 (2013.01); G06F 3/0673 (2013.01); G06T 1/20 (2013.01);
Abstract

An apparatus to facilitate processing in a multi-tile device is disclosed. The apparatus comprises a plurality of processing tiles, each including a memory device and a plurality of processing resources, coupled to the device memory, and a memory management unit to manage the memory devices in each of the plurality of tiles to perform allocation of memory resources among the memory devices for execution by the plurality of processing resources.


Find Patent Forward Citations

Mrozek, Michal. (2025). Multi-tile graphics processing unit (U.S. Patent No. 12367540). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12367540

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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