The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2025

Filed:

Dec. 23, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Juan Fang, Portland, OR (US);

Dave Cavalcanti, Portland, OR (US);

Jeffrey Foerster, Portland, OR (US);

Minyoung Park, San Ramon, CA (US);

Yi Zhang, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04W 4/00 (2018.01); H04W 76/15 (2018.01);
U.S. Cl.
CPC ...
H04W 76/15 (2018.02);
Abstract

This disclosure describes systems, methods, and devices related to latency reduction. The device may set up a plurality of links between an access point (AP) multi-link device (MLD) and a non-AP MLD. The device may encode a frame for transmission on a first link of the plurality of links between a first AP of the AP MLD and a first STA of the non-AP MLD. The device may identify an indication received at a second STA of the non-AP MLD using an interference mitigation signal. The device may cause to stop the transmission of the frame on the first link based on the indication. The device may identify a second frame on the first link received from the first AP. The device may cause to resume the transmission of the first frame on the first link.


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