The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2025

Filed:

Nov. 25, 2020
Applicant:

Soitec, Bernin, FR;

Inventors:

Young-Pil Kim, Grenoble, FR;

Daniel Delprat, Crolles, FR;

Luciana Capello, Grenoble, FR;

Isabelle Bertrand, Bernin, FR;

Frédéric Allibert, Grenoble, FR;

Assignee:

Soitec, Bernin, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/02 (2006.01); H01L 21/762 (2006.01); H01L 23/66 (2006.01); H10D 86/00 (2025.01);
U.S. Cl.
CPC ...
H01L 21/76254 (2013.01); H01L 21/02027 (2013.01); H01L 23/66 (2013.01); H10D 86/201 (2025.01);
Abstract

A handle substrate for a composite structure comprises a base substrate including an epitaxial layer of silicon on a monocrystalline silicon wafer obtained by Czochralski pulling, a passivation layer on and in contact with the epitaxial layer of silicon, and a charge-trapping layer on and in contact with the passivation layer. The monocrystalline silicon wafer of the base substrate exhibits a resistivity of between 10 and 500 ohm·cm, while the epitaxial layer of silicon exhibits a resistivity of greater than 2000 ohm·cm and a thickness ranging from 2 to 100 microns. The passivation layer is amorphous or polycrystalline. A method is described for forming such a substrate.


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