The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2025

Filed:

Aug. 02, 2023
Applicants:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Tsmc Nanjing Company Limited, Nanjing, CN;

Inventors:

Jun-Cheng Liu, Nanjing, CN;

Zhi-Min Zhu, Nanjing, CN;

Chien-Yu Huang, Taoyuan, TW;

Ching-Wei Wu, Nantou County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4074 (2006.01); G11C 11/4094 (2006.01); G11C 11/4096 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4074 (2013.01); G11C 11/4094 (2013.01); G11C 11/4096 (2013.01);
Abstract

A memory device is provided, including at least one bit cell, a pair of transistors, and a voltage generation circuit. The voltage generation circuit is coupled to the negative voltage line and is configured to pull down a voltage of at least one of the pair of data lines to a negative voltage level through the negative voltage line. The voltage generation circuit includes a first capacitive unit, a second capacitive unit, and a switch circuit. The first capacitive unit includes a first capacitor. The second capacitive unit includes a second capacitor. The switch circuit is configured to connect the first capacitor, the second capacitor, or the combination thereof to the negative voltage line in response to a first kick signal and a second kick signal that are different from each other.


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