The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2025
Filed:
Jul. 05, 2023
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Inventors:
Hsiang-Ku Shen, Hsinchu, TW;
Liang-Wei Wang, Hsinchu, TW;
Dian-Hau Chen, Hsinchu, TW;
Yen-Ming Chen, Hsin-Chu County, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 61/00 (2023.01); H01L 21/762 (2006.01); H01L 23/48 (2006.01); H01L 23/522 (2006.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H10B 61/22 (2023.02); H01L 21/76224 (2013.01); H01L 23/481 (2013.01); H01L 23/5226 (2013.01); H10D 64/01 (2025.01);
Abstract
A semiconductor device includes a substrate, a gate structure, a source region and a drain region, a conductive via and an isolation structure. The gate structure is disposed over the substrate. The source region and the drain region aside the gate structure. The conductive via is disposed in the substrate. The isolation structure is disposed in the substrate, wherein a first surface of the isolation structure is substantially flush with a first surface of the conductive via.