The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2025

Filed:

Mar. 24, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Hung-Li Chiang, Taipei, TW;

Jer-Fu Wang, Taipei, TW;

Tzu-Chiang Chen, Hsinchu, TW;

Meng-Fan Chang, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/412 (2006.01); G11C 14/00 (2006.01); H10B 10/00 (2023.01); H10D 30/69 (2025.01);
U.S. Cl.
CPC ...
H10B 10/12 (2023.02); G11C 11/412 (2013.01); G11C 14/0072 (2013.01); H10D 30/701 (2025.01);
Abstract

A static random-access memory (SRAM) cell including a transistor is introduced. The transistor includes substrate and gate stack structure disposed over the substrate, in which the gate stack structure includes a gate oxide layer, a ferroelectric layer, and a conductive layer. The gate oxide layer is disposed over the substrate; the ferroelectric layer is disposed over the gate oxide layer, wherein the ferroelectric layer has a negative capacitance effect; and the first conductive layer, disposed over the ferroelectric layer. A method of adjusting a threshold voltage of a transistor in the SRAM is also introduced.


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