The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2025
Filed:
Aug. 17, 2022
Verisilicon Microelectronics (Shanghai) Co., Ltd., Shanghai, CN;
Verisilicon Microelectronics (Chengdu) Co., Ltd., Sichuan, CN;
Verisilicon Microelectronics (Nanjing) Co., Ltd., Jiangsu, CN;
VERISILICON MICROELECTRONICS (SHANGHAI) CO., LTD., Shanghai, CN;
VERISILICON MICROELECTRONICS (CHENGDU) CO., LTD., Sichuan, CN;
VERISILICON MICROELECTRONICS (NANJING) CO., LTD., Jiangsu, CN;
Abstract
Provided are cross-linking method and apparatus, electronic device and storage medium. The method includes: modifying a register address in a first operation instruction of a library function after the register address in the first operation instruction hits a preset mapping table, wherein the mapping table includes a mapping relationship between a target register address of a main program and the register address of the library function, the target register address of the main program is increased to a first address bit number, the register address in the operation instruction of the library function has a second address bit number, the first address bit number is greater than the second address bit number, and the modified register address in the first operation instruction is the target register address of the corresponding main program in the mapping table; and migrating the modified first operation instruction into the main program.