The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2025
Filed:
Jun. 21, 2019
Silicon Storage Technology, Inc., San Jose, CA (US);
Hieu Van Tran, San Jose, CA (US);
Stephen Trinh, San Jose, CA (US);
Thuan Vu, San Jose, CA (US);
Stanley Hong, San Jose, CA (US);
Vipin Tiwari, Dublin, CA (US);
Mark Reiten, Alamo, CA (US);
Nhan Do, Saratoga, CA (US);
Silicon Storage Technology, Inc., San Jose, CA (US);
Abstract
Configurable input blocks and output blocks and physical layouts are disclosed for analog neural memory systems that utilize non-volatile memory cells. An input block can be configured to support different numbers of arrays arranged in a horizontal direction, and an output block can be configured to support different numbers of arrays arranged in a vertical direction. Adjustable components are disclosed for use in the configurable input blocks and output blocks. Systems and methods are utilized for compensating for leakage and offset in the input blocks and output blocks the in analog neural memory systems.