The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2025
Filed:
Jan. 09, 2024
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Neta Zmora, Tzur Moshe, IL;
Eran Ben-Avi, Haifa, IL;
Assignee:
INTEL CORPORATION, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/128 (2016.01); G06F 12/084 (2016.01); G06F 12/0895 (2016.01); G06N 3/044 (2023.01); G06N 3/045 (2023.01); G06N 3/063 (2023.01); G06N 3/084 (2023.01); G06N 20/00 (2019.01);
U.S. Cl.
CPC ...
G06F 12/128 (2013.01); G06F 12/084 (2013.01); G06F 12/0895 (2013.01); G06N 3/044 (2023.01); G06N 3/045 (2023.01); G06N 3/063 (2013.01); G06N 3/084 (2013.01); G06F 2212/601 (2013.01); G06F 2212/6042 (2013.01); G06F 2212/6046 (2013.01); G06N 20/00 (2019.01);
Abstract
In an example, an apparatus comprises a plurality of compute engines; and logic, at least partially including hardware logic, to detect a cache line conflict in a last-level cache (LLC) communicatively coupled to the plurality of compute engines; and implement context-based eviction policy to determine a cache way in the cache to evict in order to resolve the cache line conflict. Other embodiments are also disclosed and claimed.