The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2025

Filed:

Nov. 09, 2022
Applicants:

Commissariat a L'energie Atomique ET Aux Energies Alternatives, Paris, FR;

Thales, Courbevoie, FR;

Inventors:

Delphine Neel, Palaiseau, FR;

David Bitauld, Palaiseau, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/017 (2006.01); C23C 16/02 (2006.01); C23C 16/18 (2006.01); C30B 25/18 (2006.01); C30B 29/40 (2006.01); C30B 31/22 (2006.01); C30B 33/10 (2006.01); H10F 71/00 (2025.01);
U.S. Cl.
CPC ...
G02F 1/01708 (2013.01); C23C 16/0227 (2013.01); C23C 16/18 (2013.01); C30B 25/18 (2013.01); C30B 29/40 (2013.01); C30B 31/22 (2013.01); C30B 33/10 (2013.01); H10F 71/127 (2025.01); H10F 71/128 (2025.01); H10F 71/139 (2025.01); G02F 2202/06 (2013.01); G02F 2202/101 (2013.01); G02F 2202/102 (2013.01); G02F 2202/108 (2013.01); G02F 2203/50 (2013.01);
Abstract

A method for on-silicon integration of a III-V-based material component includes providing a first substrate having a silicon-based optical layer including a waveguide, transferring a second substrate of III-V-based material on the optical layer, and forming the III-V component from the second substrate, so as to enable a coupling between the waveguide and the III-V component, by preserving a III-V-based material layer extending laterally. The method also includes forming by epitaxy from the III-V layer, an InP:Fe-based structure laterally bordering the III-V component, forming a layer including contacts configured to contact the III-V component, and transferring a third silicon-based substrate onto the layer including the contacts.


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