The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2025

Filed:

Oct. 25, 2023
Applicant:

Raytheon Company, Waltham, MA (US);

Inventors:

Eric Miller, Lompoc, CA (US);

Christian M. Boemler, Lompoc, CA (US);

Justin Gordon Adams Wehner, Goleta, CA (US);

Drew Fairbanks, Santa Barbara, CA (US);

Sean P. Kilcoyne, Lompoc, CA (US);

Assignee:

Raytheon Company, Arlington, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/311 (2006.01); H01L 23/48 (2006.01); H01L 23/485 (2006.01); H01L 23/488 (2006.01); H10F 39/00 (2025.01); H10F 39/15 (2025.01);
U.S. Cl.
CPC ...
H10F 39/018 (2025.01); H01L 21/311 (2013.01); H01L 23/481 (2013.01); H01L 23/485 (2013.01); H01L 23/488 (2013.01); H01L 23/49827 (2013.01); H10F 39/024 (2025.01); H10F 39/026 (2025.01); H10F 39/15 (2025.01); H10F 39/805 (2025.01); H10F 39/809 (2025.01); H10F 39/811 (2025.01);
Abstract

Methods and apparatus for an assembly having directly bonded first and second wafers where the assembly includes a backside surface and a front side surface. The first wafer includes IO signal connections vertically routed to the direct bonding interface by a first one of the bonding posts on the first wafer bonded to a first one of the bonding posts on the second wafer. The second wafer includes vertical routing of the IO signal connections from first one though the bonding posts on the second wafer to IO pads on a backside surface of the assembly.


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