The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2025
Filed:
Dec. 15, 2022
Applicant:
Dspace Gmbh, Paderborn, DE;
Inventors:
Heiko Kalte, Paderborn, DE;
Dominik Lubeley, Paderborn, DE;
Assignee:
dSPACE GMBH, Paderborn, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/34 (2020.01); H03L 7/107 (2006.01);
U.S. Cl.
CPC ...
H03L 7/107 (2013.01); G06F 30/34 (2020.01);
Abstract
A method for changing a bitwidth of an FPGA configuration for an FPGA, the FPGA configuration having a plurality of at least 2bit-containing data signals with nεand ≥3, and the method having the step: when a threshold of a current consumption and/or a temperature of the FPGA is exceeded and/or a replacement signal is present, replacing k least significant bits of the data signals in each case with a zero with kεand ≥2 during an execution of the FPGA configuration on the FPGA.