The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2025

Filed:

May. 18, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Jagadish Singh, Bangalore, IN;

Rohit Parakkal, Bangalore, IN;

Tarakesava Reddy K, Bangalore, IN;

Arvind S, Bangalore, IN;

Arvindh Rajasekaran, Bangalore, IN;

Raghavendra R. Rao, Bangalore, IN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 7/00 (2006.01); G06F 1/26 (2006.01); H02M 3/158 (2006.01);
U.S. Cl.
CPC ...
H02J 7/0013 (2013.01); G06F 1/26 (2013.01); H02M 3/158 (2013.01);
Abstract

A power architecture that uses an efficient intermediate power conversion stage between AC adaptor (and battery charger) and subsequent voltage regulators (VRs) (e.g., core VR) for processors for higher overall efficiency allowing for higher performance in a given thermal envelope and iso-system input power. Power losses from both the charger and the core VR are reduced by splitting the power as power to sustained high-power rails, and power to the rest of the platform power rails that have low residency in high-power states. The sustained high-power rails are placed under an intermediate power conversion topology which is directly powered by the adaptor. The rest of the rails along with charging of the battery are powered by the battery charger.


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