The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2025
Filed:
Nov. 27, 2023
Micron Technology, Inc., Boise, ID (US);
Roberto Izzi, Caserta, IT;
Luca Porzio, Casalnuovo, IT;
Sean L. Manion, Boise, ID (US);
Massimo Zucchinali, Torre Boldone, IT;
Bryan D. Butler, Boise, ID (US);
Andrea Vigilante, Milan, IT;
Marco Onorato, Villasanta, IT;
Alfredo Palazzo, Monza, IT;
Micron Technology, Inc., Boise, ID (US);
Abstract
Methods, systems, and devices for latency reduction of boot procedures for memory systems are described. A memory system may receive a first command to perform a first reset of one or more components as part of a first phase of a boot procedure of a host system. The memory system may initiate an initialization process of a second phase of the boot procedure upon determining whether the value of a flag has been set from a first value to a second value. Upon completing the initialization process, the flag may be set to the first value. Parameters corresponding to the characteristics of the memory system may be communicated to the host system based on receiving a second command. The memory system may perform a configuration operation of a logical-to-physical mapping concurrently with communicating the parameters with the host system.