The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 24, 2025
Filed:
Dec. 27, 2022
Vanguard International Semiconductor Corporation, Hsinchu, TW;
Yeh-Ning Jou, Hsinchu, TW;
Jian-Hsing Lee, Hsinchu, TW;
Chieh-Yao Chuang, Kaohsiung, TW;
Hsien-Feng Liao, Taichung, TW;
Ting-Yu Chang, Zhubei, TW;
Chih-Hsuan Lin, Hsinchu, TW;
Wen-Hsin Lin, Zhubei, TW;
Hwa-Chyi Chiou, Hsinchu, TW;
VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION, Hsinchu, TW;
Abstract
An ESD protection device includes a substrate, an epitaxial layer, first to third well regions, and first to sixth doped regions. The first to third well regions are disposed in the epitaxial layer. The third well region is disposed between the first and second well regions. The first and second doped regions are disposed on the first well region and coupled to a pad. The third and fourth doped regions are disposed on the second well region and coupled to a ground terminal. The fifth doped region is disposed on the third well region, and the sixth doped region is disposed in the fifth doped region. The third, fifth, and sixth doped regions have the same conductive type. In response to an electrostatic discharge event occurring on the pad, a discharge path is formed between the pad and the ground terminal.