The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2025

Filed:

May. 18, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Jingwen Lu, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/053 (2023.02); H10B 12/34 (2023.02);
Abstract

A method for manufacturing a semiconductor structure includes: providing a substrate and multiple spaced active areas on the substrate and an isolation structure between the adjacent active areas, in which, each of active areas includes multiple sub-active areas which intersect the initial bit line, and an initial bit line is provided on the substrate; patterning the active areas, the isolation structure and the initial bit line to form a word line trench located within the sub-active areas, the isolation structure, and the initial bit line, in which the remaining initial bit line serves as a bit line; forming a gate dielectric layer located on surfaces of the sub-active areas exposed by the word line trench; forming a word line and an insulating structure between the word line and the bit line, in which the word line is located on the gate dielectric layer and fills the word line trench.


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