The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2025

Filed:

Jun. 09, 2021
Applicant:

Intel Ndtm Us Llc, Santa Clara, CA (US);

Inventors:

Chang Wan Ha, San Ramon, CA (US);

Deepak Thimmegowda, Fremont, CA (US);

Hoon Koh, San Jose, CA (US);

Richard M. Gularte, Santa Clara, CA (US);

Liu Liu, Dalian, CN;

David Meyaard, Boise, ID (US);

Ahsanur Rahman, Santa Clara, CA (US);

Assignee:

SK Hynix NAND Product Solutions Corp., Rancho Cordova, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G11C 16/0483 (2013.01);
Abstract

An embodiment of a memory device may include a full block memory array of a lower tile of 3D NAND string memory cells, a full block memory array of an upper tile of 3D NAND string memory cells, a first portion of a string driver circuit coupled to the full block memory array of the lower tile, a second portion of the string driver circuit coupled to the full block memory array of the upper tile, a first split block memory array of the lower tile coupled to the first portion of the string driver circuit, and a second split block memory array of the upper tile coupled to the second portion of the string driver circuit. Other embodiments are disclosed and claimed.


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