The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2025

Filed:

Dec. 28, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Andrea Martinelli, Bergamo, IT;

Francesco Mastroianni, Melzo, IT;

Kiyoshi Nakai, Tokyo, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/08 (2006.01); G11C 7/10 (2006.01); G11C 7/12 (2006.01); G11C 11/22 (2006.01); G11C 11/408 (2006.01); G11C 11/4091 (2006.01);
U.S. Cl.
CPC ...
G11C 11/2255 (2013.01); G11C 7/08 (2013.01); G11C 7/1063 (2013.01); G11C 7/109 (2013.01); G11C 7/12 (2013.01); G11C 11/221 (2013.01); G11C 11/2259 (2013.01); G11C 11/2273 (2013.01); G11C 11/4087 (2013.01); G11C 11/4091 (2013.01);
Abstract

Methods, systems, and devices for circuitry borrowing in memory arrays are described. In one example, a host device may transmit an access command associated with data for a first memory section to a memory device. The first memory section may be located between a second memory section and a third memory section. A first set of circuitry shared by the first memory section and the second memory section may be operated using drivers associated with the first memory section and drivers associated with the second memory section. A second set of circuitry shared by the first memory section and the third memory section may be operated using drivers associated with the first memory section and drivers associated with the third memory section. An access operation may be performed based on operating the first set of circuitry and the second set of circuitry.


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