Detecting instability in combinational loops in electronic circuit designs

Abstract

A method includes: loading a circuit design including a plurality of combinational elements and controlled by a user clock; detecting strongly connected components (SCCs) corresponding to the plurality of combinational elements in the circuit design; inserting a plurality of break registers into the circuit design, each break register being between two combinational elements of a corresponding SCC of the SCCs to break the corresponding SCC, the plurality of break registers being clocked by a relaxation clock; detecting, by a processor, during an emulation run of the circuit design, one or more value mismatches across an input pin and an output pin of one or more break registers of the plurality of break registers based on a relaxation cycle of the relaxation clock, the one or more break registers being associated with one or more SCCs exhibiting instability; and reporting an instability event based on the one or more value mismatches.