The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2025

Filed:

Apr. 20, 2022
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Rouying Zhan, Chandler, AZ (US);

Yupeng Chen, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 89/60 (2025.01);
U.S. Cl.
CPC ...
H10D 89/713 (2025.01);
Abstract

In an example, a semiconductor device includes a region of semiconductor material with a buried doped region of a first conductivity type. A first well region of the first conductivity type is in the region of semiconductor material and is electrically coupled to the buried doped region. A second well region of a second conductivity type is in the region of semiconductor material and has a first peak dopant concentration. A third well region of the second conductivity type abuts edges of the second well region. The third well region is interposed between the first well region and the second well region and has a second peak dopant concentration that is different than the first peak dopant concentration. A doped anode region of the second conductivity type is in the first well region, a doped cathode region of the first conductivity type is in the second well region, and a doped contact region of the second conductivity type is in the second well region. The semiconductor device can be configured as a semiconductor-controlled rectifier (SCR) ESD device where the controlling mechanisms for DC breakdown voltage and holding voltage are decoupled. Other related examples and methods are disclosed herein.


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