The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2025
Filed:
Aug. 26, 2021
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Ming-Yeh Chuang, McKinney, TX (US);
Umamaheswari Aghoram, Richardson, TX (US);
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/62 (2025.01); H10D 30/01 (2025.01); H10D 64/00 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01);
U.S. Cl.
CPC ...
H10D 84/834 (2025.01); H10D 30/024 (2025.01); H10D 30/6211 (2025.01); H10D 64/111 (2025.01); H10D 84/013 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01);
Abstract
One example includes an integrated circuit (IC) comprising a fin field effect transistor (FinFET). The FinFET includes a substrate with a fin extending from a surface of the substrate. The fin includes a source region, a drain region, and a drift region adjacent the drain region. The fin also includes a field-plating (FP) dielectric layer on a first side, a second side, and a third side of the drift region. The FP dielectric layer includes a high-K material.