The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2025
Filed:
Dec. 05, 2022
Applicant:
United Microelectronics Corp., Hsin-Chu, TW;
Inventor:
Chun-Hsien Lin, Tainan, TW;
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 84/85 (2025.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 21/3213 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 64/01 (2025.01); H10D 64/66 (2025.01);
U.S. Cl.
CPC ...
H10D 64/021 (2025.01); H01L 21/02071 (2013.01); H01L 21/02244 (2013.01); H01L 21/28123 (2013.01); H01L 21/32135 (2013.01); H01L 21/32139 (2013.01); H10D 30/024 (2025.01); H10D 30/6211 (2025.01); H10D 64/017 (2025.01); H10D 64/671 (2025.01);
Abstract
A method for fabricating a semiconductor device includes the steps of: forming a fin-shaped structure on a substrate, forming a gate material layer on the fin-shaped structure, performing an etching process to pattern the gate material layer for forming a gate structure and a silicon residue, performing an ashing process on the silicon residue, and then performing a cleaning process to transform the silicon residue into a polymer stop layer on a top surface and sidewalls of the fin-shaped structure.