The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2025

Filed:

Mar. 25, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Li Tang, Hefei, CN;

Cheng Chen, Hefei, CN;

Yuxia Wang, Hefei, CN;

Wei Jiang, Hefei, CN;

Jing Xu, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 89/00 (2025.01); H01L 23/528 (2006.01); H10D 62/10 (2025.01); H10D 89/10 (2025.01);
U.S. Cl.
CPC ...
H01L 23/5286 (2013.01); H10D 62/106 (2025.01); H10D 89/10 (2025.01);
Abstract

The present disclosure provides a semiconductor device and a semiconductor layout structure. In the semiconductor device, a guard ring of a first type is arranged on at least one side of a transistor of a second type, and a guard ring of a second type is arranged on at least one side of a transistor of a first type, such that a plurality of signal lines in a first metal layer in the semiconductor layout structure may be arranged between a first power source line and a first ground line. Furthermore, in a second metal layer, a plurality of second power source lines are connected to one first power source line, and a plurality of second ground lines are connected to one first ground line.


Find Patent Forward Citations

Loading…