The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2025
Filed:
Jul. 13, 2023
Sambanova Systems, Inc., Palo Alto, CA (US);
Yue Fu, Palo Alto, CA (US);
Kin Hing Leung, Cupertino, CA (US);
Joshua Brot, Palo Alto, CA (US);
Arvind Krishna Sujeeth, Palo Alto, CA (US);
Sumti Jairath, Palo Alto, CA (US);
Andrew Deng, San Jose, CA (US);
Raghu Prabhakar, San Jose, CA (US);
SambaNova Systems, Inc., Palo Alto, CA (US);
Abstract
A cost estimation tool in a system for implementing an operation unit graph on a reconfigurable processor is presented as well as a method of operating a cost estimation tool for determining scaled logical edge bandwidths in an operation unit graph in preparation of placing and routing the operation unit graph onto a reconfigurable processor. The cost estimation tool may be configured to receive the operation unit graph, divide the operation unit graph in first and second subgraphs, determine maximum latencies of the first and second subgraphs, and determine a scaled logical edge bandwidth of a logical edge that couples a first logical unit of M logical units in the first subgraph with a second logical unit of N logical units in the first subgraph based on M, N, and scaled bandwidth limits of the M and N logical units.