The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 10, 2025
Filed:
Sep. 24, 2021
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Nishant Singh, Bangalore, IN;
Daniel W. Liu, Concord, CA (US);
Sharada Venkateswaran, San Francisco, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 3/06 (2006.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 3/065 (2013.01); G06F 3/0619 (2013.01); G06F 3/0679 (2013.01); G06F 11/073 (2013.01); G06F 11/0751 (2013.01); G06F 11/0772 (2013.01);
Abstract
Technologies for memory mirroring across an interconnect are disclosed. In the illustrative embodiment, a primary memory agent that controls a single memory channel can implement memory mirroring by sending mirrored memory operations to a secondary memory agent over an interconnect. In the illustrative embodiment, the secondary memory agent may not be aware that it is performing mirrored memory operations. The primary memory agent may handle error recovery, scrubbing, and failover to the secondary memory agent.